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Traditional multi-processor systems require the creation of a custom chipset and board to enable processor communication and shared memory. The larger the system is, the more complex the required solution is. Chipsets that support more than four processors are complicated to design, and very few implementations exist. Moreover, as the technology refresh cycle in the x86 space is 18 months or less, chipsets and boards require significant ongoing investments to keep up with the advancement of technology. This inevitably results in slower technology adaptations in the high-end market and more expensive, low-performing systems. The Versatile SMP (vSMP) architecture utilizes off-the-shelf components and do not require any custom parts. The key value of the vSMP architecture is the utilization of software to provide the chipset services that are otherwise required in creating traditional multi-processor systems. vSMP Foundation provides cache coherency, shared I/O and the system interfaces (BIOS, ACPI) , which are required by the OS. The vSMP architecture is implemented in a completely transparent manner; no additional device drivers are required and no modifications to the OS or the applications are necessary. RequirementsvSMP Foundation requires:
One SystemOnce loaded into the memory of each of the system boards, vSMP Foundation aggregates the compute, memory and I/O capabilities of each system and presents a unified virtual system to both the Operating System and the applications running above the OS. vSMP Foundation uses a software-interception engine in the form of a Virtual Machine Monitor (VMM) to provide a uniform execution environment. vSMP Foundation also creates the required BIOS and ACPI environment to provide the OS (and the software stack above the OS) a coherent image of a single system. Coherent MemoryvSMP Foundation maintains cache coherency between the individual boards using multiple advanced coherency algorithms. These complex algorithms operate concurrently on a per-block basis, based on real-time memory activity access patterns. vSMP Foundation leverages board local-memory together with best-of-breed caching algorithms to minimize the effect of interconnect latencies. Shared I/OvSMP Foundation aggregates I/O resources across all boards into a unified PCI hierarchy and presents them as a common pool of I/O resources to the OS and the application. The OS is able to utilize all the system storage and networking controllers towards providing high-I/O system capabilities. Versatile SystemvSMP Foundation aggregates system boards with different processor speeds, varied memory amounts or dissimilar I/O devices. This is a unique capability among x86 shared memory systems. For applications that are compute-intensive, it is possible to create homogenous systems with up to 32 sockets (128 cores) and 1 TB RAM, delivering more than 1.5 TFLOPS. For applications that are memory-intensive and not compute-intensive, an imbalanced configuration that mixes high-speed and low-speed processors can be architected. With such an imbalanced configuration, vSMP Foundation will aggregate only the high-speed processors, while not exposing the low-speed processors to the Operating System. Such a configuration allows reduced costs and power consumption, providing large-memory and top system performance. Similarly, the customer can mix and match I/O expansion options to fit application needs, making it possible to deliver the industry's most versatile and flexible high-end x86 systems. Coupled with the price/performance attributes, solutions based on vSMP Foundation provide customers the best value for their money. |